[Lunar-commits] <moonbase-other> irqbalance: version bumped to 1.0.7.

[Florin Braescu]

commit 55b338897e77a514b06645a506404911896f8bbc
Author: Florin Braescu <florin at lunar-linux.org>
Date: Thu, 20 Nov 2014 13:21:51 +0200
URL: https://github.com/lunar-linux/moonbase-other/commit/55b338897e77a514b06645a506404911896f8bbc

irqbalance: version bumped to 1.0.7.
---
  kernel/irqbalance/DEPENDS | +4/-2     
  kernel/irqbalance/DETAILS | +12/-8    
  2 files changed, 16 insertions(+), 10 deletions(-)

--- a/kernel/irqbalance/DEPENDS
+++ b/kernel/irqbalance/DEPENDS
@@ -1,3 +1,5 @@
-depends  gccmakedep
+depends  glib-2
+depends  libcap-ng
+depends  numactl
 
-optional_depends "libcap-ng" "--with-libcap-ng" "--without-libcap-ng" "For next generation of library capabilty support"
+#optional_depends "libcap-ng" "--with-libcap-ng" "--without-libcap-ng" "For next generation of library capabilty support"
--- a/kernel/irqbalance/DETAILS
+++ b/kernel/irqbalance/DETAILS
@@ -1,13 +1,17 @@
           MODULE=irqbalance
-         VERSION=0.56
-          SOURCE=$MODULE-$VERSION.tar.bz2
-      SOURCE_URL=http://www.irqbalance.org/releases/
-      SOURCE_VFY=sha1:64065ab2d9eeecc9bf15c242453c9882b36c85fb
-        WEB_SITE=http://www.irqbalance.org/
+         VERSION=1.0.7
+          SOURCE=v$VERSION.tar.gz
+      SOURCE_URL=https://github.com/Irqbalance/irqbalance/archive/
+      SOURCE_VFY=sha256:8c3916780d254b74fb1c7ec22876d63ac01f1b32776d9204a604b73c8f591d2a
+        WEB_SITE=https://github.com/Irqbalance/irqbalance
          ENTERED=20060124
-         UPDATED=20111007
+         UPDATED=20141113
            SHORT="IRQ load balancing daemon for 2.6 kernels"
+
 cat << EOF
-Daemon to balance irq's across multiple CPUs on systems with the 2.4
-or 2.6 kernel.  Only useful on SMP systems.
+Irqbalance is a daemon to help balance the cpu load generated by interrupts
+across all of a systems cpus.  Irqbalance identifies the highest volume
+interrupt sources, and isolates them to a single unique cpu, so that load is
+spread as much as possible over an entire processor set, while minimizing cache
+hit rates for irq handlers.
 EOF